@article{Bou4,
title = { {Construire des logiciels fiables} },
author = {Boulm\'e, Sylvain},
month = {Jan},
year = {2024},
journal = {{Interstices}},
publisher = {{INRIA}},
team = {axe_FormalProofs, PACSS},
hal_id = {hal-04438448},
}
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- Seminars
- 16 May 2024 Gaiyun Liu: Modeling, analysis, and supervisory control of networked discrete event systems
- 30 May 2024 Mohamed Maghenem: A hybrid-systems framework for distributed gradient-based estimation
- 27 June 2024 Nicolas Chappe: Tba (toward a verified compilation infrastructure for concurrent programs)
Seminars
New publications
- Some Recent Publications
- Erwan Jahier, Karine Altisen, Stéphane Devismes: Exploring Worst Cases of Self-stabilizing Algorithms using Simulations
- Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: Self-stabilizing synchronous unison in directed networks
- Léo Gourdin: Lazy Code Transformations in a Formally Verified Compiler
- Bruno Ferres, Oussama Oulkaid, Ludovic Henrio, Mehdi Khosravian, Matthieu Moy, Gabriel Radanne, Pascal Raymond: Electrical Rule Checking of Integrated Circuits using Satisfiability Modulo Theory
Jobs and internships
- Jobs and internships
- [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
- PERSYVAL Master 2 Scholarships
- [Funded PhD/PostDoc] Countermeasures to (transient) Side-Channel Attacks in a Formally Verified Compiler
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Formal Methods for the Verification of Self-Adapting Distributed Systems
- [Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences