@article{AAM06,
title = { Scheduling with timed automata },
author = {Abdedda\"im, Yasmina and Asarin, Eugene and Maler, Oded},
year = {2006},
journal = {Theor. Comput. Sci.},
number = {2},
pages = {272-300},
volume = {354},
team = {TEMPO},
bibsource = {DBLP, http://dblp.uni-trier.de},
}
Home > Verimag > Publications
bibtex
Browsing
News
Seminars
New publications
- Some Recent Publications
- Bruno Ferres, Oussama Oulkaid, Ludovic Henrio, Mehdi Khosravian, Matthieu Moy, Gabriel Radanne, Pascal Raymond: Electrical Rule Checking of Integrated Circuits using Satisfiability Modulo Theory
- Dominique Larchey-Wendling, Jean-François Monin: Proof Pearl: Faithful Computation and Extraction of \mu-Recursive Algorithms in Coq
- David Monniaux, Léo Gourdin, Sylvain Boulmé, Olivier Lebeltel: Testing a Formally Verified Compiler
- Karine Altisen, Pierre Corbineau, Stéphane Devismes: Certified Round Complexity of Self-Stabilizing Algorithms
Jobs and internships
- Jobs and internships
- [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
- PERSYVAL Master 2 Scholarships
- Junior professorship chair on verifiable / explainable artificial intelligence
- Poste de professeur des universités (section 27)
- [Funded PhD/PostDoc] Countermeasures to (transient) Side-Channel Attacks in a Formally Verified Compiler
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Formal Methods for the Verification of Self-Adapting Distributed Systems
- [Master] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences