title = { Rigorous Design Flow for Programming Manycore Platforms },
author = {Bourgos, Paraskevas},
month = {apr},
year = {2013},
school = {Universit\'{e} de Grenoble},
team = {DCS},
}
Home > Verimag > Publications
bibtex
@phdthesis{Bou13a,
title = { Rigorous Design Flow for Programming Manycore Platforms },
author = {Bourgos, Paraskevas},
month = {apr},
year = {2013},
school = {Universit\'{e} de Grenoble},
team = {DCS},
}
title = { Rigorous Design Flow for Programming Manycore Platforms },
author = {Bourgos, Paraskevas},
month = {apr},
year = {2013},
school = {Universit\'{e} de Grenoble},
team = {DCS},
}
Browsing
New publications
- Recent Publications
- Klaus Havelund, Doron Peled, Dogan Ulus: First order temporal logic monitoring with BDDs
- Jonathan Salwan, Sebastien Bardin, Marie-Laure Potet: Deobfuscation of VM based software protection
- Jannik Dreier, Maxime Puys, Marie-Laure Potet, Pascal Lafourcade, Jean-Louis Roch: Formally Verifying Flow Properties in Industrial Systems
- Fabienne Carrier, Ajoy Kumar Datta, Stéphane Devismes, Lawrence L. Larmore: L-Exclusion autostabilisante revisitée
- Dejan Nickovic, Olivier Lebeltel, Oded Maler, Thomas Ferrére, Dogan Ulus: AMT 2.0: Qualitative and Quantitative Trace Analysis with Extended Signal Temporal Logic
- Formal Modeling and Analysis of Timed Systems - 16th International Conference, FORMATS 2018, Beijing, China, September 4-6, 2018, Proceedings
Jobs and internships
- Jobs and internships
- Phd Position: Vulnerability search in Industrial Control Systems
- Phd Proposal : Inférence de modèles de faute pour simulation d’attaques sur composants sécurisés
- Phd proposal : Optimisation de l’évaluation et des tests de sécurité des systèmes cyber-physiques par analyse des canaux auxiliaires
- Post-Doc and/or Research Engineer positions on Software Security
- [M1 internship] Modeling of Graph Topologies Using Coq
- [M2 internship] Certification of Distributed Self-Stabilizing Algorithms Using Coq
