Verimag

[Master 2R 2010-2011] Fast simulation of Systems-on-Chip

Acceleration techniques for SystemC

Laboratory: Verimag (http://www-verimag.imag.fr/)

Team: SYNCHRONE (http://www-verimag.imag.fr/SYNCHRONE)

Supervisor: Matthieu Moy <Matthieu.Moy imag.fr> and Pascal Raymond <Pascal.Raymond imag.fr>

 Scientific Context

The silicon industry is widely adopting a methodology called Transaction-Level Modeling (TLM), that consists essentially in writting abstract, but yet executable models the hardware contained in a Chip.

SystemC is a C++ library used for the description of SoCs at different levels of abstraction, including TLM. It comes with a simulation environment, and became a standard (IEEE 1666). SystemC offers a set of primitives for the description of parallel activities representing the physical parallelism of the hardware blocks. The TLM level of abstraction can be described with SystemC.

SystemC models simulate orders of magnitude faster than the low-level Register Transfer-Level (RTL) implementation. However, modern Systems-on-Chips comprising tens of processors already reach the limits of the approach. Among the performance bottlenecks of SystemC, are:

  1. SystemC is not able to exploit the parallelism of the simulated platform. The simulation is purely sequential even on multi-core host machines.
  2. Because SystemC was implemented as a library, it is possible to compile a SystemC program with any C++ compiler. But using a general-purpose compiler misses some optimization opportunities.

We already proposed several approaches to solve these points (see Samuel Jones, Mohamed-Zaim Wadghiri and Si-Mohamed Lamraoui for details). Preliminary experiments showed that the approaches were promising and allowed important speedups in the best cases, but do not yet allow a real speedup on real-life programs.

 Subject

The goal of the internship is, after getting familiar with the existing approaches, to experiment them on medium-size programs, to identify both the performance bottlenecks and the limitations in practice.

Some improvements of the existing approaches and implementation will then be needed to remove these bottlenecks, and if possible, allow several approaches to be combined (e.g. allow a parallel execution of a platform compiled with a SystemC-specific optimizer).

 Required Skills

  • Programming skills in C++
  • Compilation (notion of control-flow graph, basic-blocks...)
  • Parallel programming (pthreads)
  • Unix/Linux

 Work context

Matthieu Moy is assistant professor in Verimag and the Ensimag school. He started working on SystemC in 2002 during his Ph. D.

Pascal Raymond is researcher in Verimag, and worked on a semantics-preserving parallelization of SystemC.


Contact | Site Map | Site powered by SPIP 3.0.24 + AHUNTSIC [CC License]

info visites 729817