Verimag

Seminar details

CTL Ampitheatre
9 April 2013 - 13h30
Rigorous Design Flow for Programming Manycore Platforms (Phd Defense)
by Paraskevas Bourgos from Verimag / UJF



Abstract: The advent of many-core platforms is nowadays challenging our capabilities for efficient and predictable design. To meet this challenge, designers need methods and tools for
guaranteeing essential properties and determining tradeoffs between performance and efficient resource management. In the process of designing a mixed software/hardware system, functional constraints and also extra-functional specifications should be taken into account as an essential part for the design of embedded systems. The impact of design choices on the overall behavior of the system should also be analyzed. This implies a deep understanding of the interaction between application software and the underlying execution platform.
We present a rigorous model-based design flow for building parallel applications running on top of many-core platforms. The flow is based on the BIP - Behavior, Interaction, Priority - component framework and its associated toolbox. The method allows generation of a correct-by-construction mixed hardware/software system model for manycore platforms from an application software and a mapping. It is based on source-to-source correct-by-construction transformations of BIP models. It provides full support for modeling application software and validation of its functional correctness, modeling and performance analysis of system-level models, code generation and deployment on target many-core platforms.
Our design flow is illustrated through the modeling and deployment of various software applications on two different hardware platforms; MPARM and platform P2012/STHORM. MPARM is a virtual ARM-based multi-cluster manycore platform, configured by the number of clusters, the number of ARM cores per cluster, and their interconnections. On MPARM, the software applications considered are the Cholesky factorization, the MPEG-2 decoding, the MJPEG decoding, the Fast Fourier Transform and the Demosaicing algorithm. Platform 2012 (P2012/STHORM) is a power efficient manycore computing fabric, which is highly modular and based on multiple clusters capable of aggressive fine-grained power management. As a case study on P2012/STHORM, we used the HMAX algorithm.
Experimental results show the merits of the design flow, notably performance analysis as well as correct-by-construction system level modeling, code generation and efficient
deployment.



Jury:
- Radu Grosu, Professeur, TUW (Vienna University of Technology), Rapporteur
- Albert Cohen, Professeur, École Polytechnique, Rapporteur
- Roberto Passerone, Professeur, University of Trento, Examinateur
- Jean Claude Fernandez, Professeur, Université Joseph Fourier, Examinateur
- Joseph Sifakis, Professeur, EPFL (École polytechnique fédérale de Lausanne), Examinateur
- Saddek Bensalem, Professeur, Université Joseph Fourier, Directeur de thèse

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